Difference between hot-plug on PCIe rootport vs downstream port

[Rajat Jain]

Hello,

1) Does the pciehp support hotplug on both rootport and downstream port?

2) What is so different about these that downstream port hotplug was part of the kernel since very long, but root port hotplug was included releatively recently? Are there any added complexities? I couldn't find anything on the net on this. From my understanding it should be exactly similar?

3) I understand the hotplug on downstream port is architecture independent. But is the root port hotplug architecture dependent (assuming that the CPU complies to the PCIe, spec, it shouldn't be, right)?

4) Can you point me to the code where the root port hotplug is implemented?

Thanks,

Rajat

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[Bjorn Helgaas]

Post by Rajat Jain
Hello,
1) Does the pciehp support hotplug on both rootport and downstream port?

Yes. To be precise, pciehp supports hotplug of PCIe devices below
Root Ports and Downstream Ports.

Post by Rajat Jain
2) What is so different about these that downstream port hotplug was part of the kernel since very long, but root port hotplug was included releatively recently? Are there any added complexities? I couldn't find anything on the net on this. From my understanding it should be exactly similar?

Hotplugging of PCIe devices below Root Ports and Downstream Ports
should be identical.

My guess is that you're confused by the recent addition of PCI *host
bridge* hotplug. This is for hotplugging an entire Root Complex or
other host bridge. A host bridge is not a PCI or PCIe device (though
a Root Complex *contains* Root Ports). It has some platform-specific
interface on the upstream side and a PCI or PCIe interface on the
downstream side. There is no architected way to discover host bridge
existence, apertures, address translation, etc. This is all done via
ACPI or other platform-specific methods, not via PCI mechanisms.
Therefore, hotplug of a host bridge is much different than hotplug of
a PCI device.

Post by Rajat Jain
3) I understand the hotplug on downstream port is architecture independent. But is the root port hotplug architecture dependent (assuming that the CPU complies to the PCIe, spec, it shouldn't be, right)?

The PCIe spec doesn't really apply to CPUs. The above should clarify the rest.

Post by Rajat Jain
4) Can you point me to the code where the root port hotplug is implemented?

Host bridge hotplug is implemented in drivers/acpi/pci_root.c.
Obviously this only applies to arches that use ACPI (currently x86 and
ia64).

Bjorn
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[Rajat Jain]

Post by Rajat Jain
1) Does the pciehp support hotplug on both rootport and downstream

port?
Yes. To be precise, pciehp supports hotplug of PCIe devices below Root
Ports and Downstream Ports.

Post by Rajat Jain
2) What is so different about these that downstream port hotplug was

part of the kernel since very long, but root port hotplug was included
releatively recently? Are there any added complexities? I couldn't find
anything on the net on this. From my understanding it should be exactly
similar?
Hotplugging of PCIe devices below Root Ports and Downstream Ports
should be identical.

Thanks a lot, I think you are right. I got confused between hot-plug of a device on root port, and hot-plug of the root port itself.

No I'm not bothered about the hot-plug of the host bridge itself. I was talking abouthot-plug of a device directly under the root port.

So I' assuming I should be good with pciehp then.

Thanks,

Rajat